RS-flip-flop. Umgomo we operation, imidvwebo obusebenzayo, shintsha ithebula

Kuvuse - elingeyona inkimbinkimbi kuyinto umshini digital. It has ukuzinza ezimbili isimo. Omunye mibandela inikezwa ngenani "1", kanye nezinye - "0". isimo Trigger, futhi ukubaluleka ulwazi kanambambili okuyinto kugcinwa therein amasignali okukhipha kunqunywa: Direct futhi nabokhulumile. Esimeni lapho ngqo okukhipha ezingaba Kumiswa, okuhambelana bacabanga omunye, isimo flip-flop ngokuthi iyunithi (bezikhali eMhlanganweni ekhishwa nabokhulumile zero). Uma okukhipha ngqo akuyona engaba ke isimo inhlamvu ibizwa ngokuthi zero.

Ashaywe ihlukaniswa by izici ezilandelayo:

1. By indlela ukuqopha ulwazi (zokuvumelanisa iphinde indlela).

2. Ngendlela kolwazi lokulawula (izibalo, ashukumisayo, owodwa esigabeni, multistage).

3. ngu indlela ukugcwaliseka uxhumano okunengqondo (JK-flip-flop, RS-trigger, T-Triger, D-flip-flop kanye nezinye izinhlobo).

Amapharamitha oyinhloko zonke izinhlobo trigger kukhona ukubaluleka elikhulu okokufaka isignali isikhathi, isikhathi ukubambezeleka adingekayo ukushintsha flip-flop, futhi sivumele ukusebenza isikhathi.

Kulesi sihloko, ake sixoxe lolu hlobo idivayisi, njengoba RS-flip-flop. Ziyakwazi ezimbili zama: zokuvumelanisa iphinde indlela.

Okungavumelanisiwe RS-flip-flop ine imigqa emibili ngokwakhayo (R S) input. Lolu cingo ngokuvumelana shintsha ithebula.

Vala enjalo flip-flop luyinhlanganisela amasignali e-okokufaka zedivayisi, okubangela isimo yokungaqiniseki. Le nhlanganisela ungaboniswa njengemfuneko RtSt = 0. Ngo ukunciphisa ibalazwe Karnaugh ukuboniswa ukusebenza umthetho inhlamvu, othiwa kwesibalo isici: Q (t + 1) = St V R'tQt. Ngakho RtSt zero.

On kulombhalo obusebenzayo ikhombisa RS-flip-flop indlela uhlobo NAND futhi ukusebenza wesibili NOMA izakhi.

Eyesibili uhlobo - zokuvumelanisa RS-FF. Okunjalo idivayisi kuyinto ikhipha has okokufaka ngqo S ezintathu, R, futhi C. Umehluko phakathi zokuvumelanisa iphinde indlela uhlobo flip-flop kuba phambi okokufaka ukuvumelanisa (C). Kuyadingeka ngenxa yezizathu ezilandelayo: ngoba okutshiyeneyo kudivayisi (logic elementi) amasignali ithunyelwa ngaso sonke isikhathi kanyekanye. Lokhu kungenxa yokuthi idlule izinhlobo ezahlukene kanye nenani ISIZINDA ukuthi babe ukubambezeleka ezahlukene. Lesi simo esiyingqayizivele sibangelwa ibizwa ngokuthi "umdlalo." Ngenxa "izenzakalo" enjalo amagugu isignali etholwe uzobe esikhulu amagugu yangaphambili nezinye izimpawu. Konke lokhu kuholela kumadivayisi alamu okungeyona.

Lesi simo esiyingqayizivele sibangelwa luqedwe ngokusebenzisa izimpawu okokufaka isikhathi kudivayisi gating. Okungukuthi, ngesikhathi uvo NAND esangweni ngaphandle ngqo amasignali Ulwazi olunikezwe ukhiye ukuvumelanisa pulses, lolu lwazi ngesikhathi amasignali okokufaka isikhathi ukukhiya ungene input.

Isimo esiyinhloko ukusetshenziswa ngemfanelo ukushintsha logic izigaba ku RS-flip-flop kanye logic kulawulwa kubo - RT unacceptability isinyathelo esisodwa noma i-signal St, idivayisi usuke, kanye nokwaziswa ukubuyisa kusuka okukhiphayo Q (t +1) flip-flop. Kule ndaba, uchungechunge ezingaba iqukethe izinto zokuvumelanisa kuphela.

RS-uhlobo flip-flop isici zokuvumelanisa emelelwa ezothando: Q (t + 1) = StCt V R'tQt V QtC't.

Isithombe ikhombisa RS-trigger uhlobo zokuvumelanisa NAND. Wokufaka KANYE amasango, HHAYI iyunithi okunengqondo idluliselwa ku S noma R idatha ukushintsha okokufaka i lokufakwako kudingekile RS indlela uthayiphe isiqhebezo ne input okuhlanekezelwe kuphela uma kokufaka zokuvumelanisa (C) isignali at logic eyodwa.